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ST STM32F405 User Manual

ST STM32F405
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RM0090 Rev 18 1517/1749
RM0090 USB on-the-go high-speed (OTG_HS)
1543
Endpoint activation
This section describes the steps required to activate a device endpoint or to configure an
existing device endpoint to a new type.
1. Program the characteristics of the required endpoint into the following fields of the
OTG_HS_DIEPCTLx register (for IN or bidirectional endpoints) or the
OTG_HS_DOEPCTLx register (for OUT or bidirectional endpoints).
Maximum packet size
USB active endpoint = 1
Endpoint start data toggle (for interrupt and bulk endpoints)
Endpoint type
TxFIFO number
2. Once the endpoint is activated, the core starts decoding the tokens addressed to that
endpoint and sends out a valid handshake for each valid token received for the
endpoint.
Endpoint deactivation
This section describes the steps required to deactivate an existing endpoint.
1. In the endpoint to be deactivated, clear the USB active endpoint bit in the
OTG_HS_DIEPCTLx register (for IN or bidirectional endpoints) or the
OTG_HS_DOEPCTLx register (for OUT or bidirectional endpoints).
2. Once the endpoint is deactivated, the core ignores tokens addressed to that endpoint,
which results in a timeout on the USB.
Note: The application must meet the following conditions to set up the device core to handle
traffic:
NPTXFEM and RXFLVLM in GINTMSK must be cleared.
35.13.7 Operational model
SETUP and OUT data transfers
This section describes the internal data flow and application-level operations during data
OUT transfers and SETUP transactions.
Packet read
This section describes how to read packets (OUT data and SETUP packets) from the
receive FIFO in Slave mode.
1. On catching an RXFLVL interrupt (OTG_HS_GINTSTS register), the application must
read the Receive status pop register (OTG_HS_GRXSTSP).
2. The application can mask the RXFLVL interrupt (in OTG_HS_GINTSTS) by writing to
RXFLVL = 0 (in GINTMSK), until it has read the packet from the receive FIFO.
3. If the received packet’s byte count is not 0, the byte count amount of data is popped
from the receive Data FIFO and stored in memory. If the received packet byte count is
0, no data is popped from the receive data FIFO.

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ST STM32F405 Specifications

General IconGeneral
BrandST
ModelSTM32F405
CategoryComputer Hardware
LanguageEnglish

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