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ST STM32F405 User Manual

ST STM32F405
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RM0090 Rev 18 1543/1749
RM0090 USB on-the-go high-speed (OTG_HS)
1543
host negotiation success. The application must read the current Mode bit in the Core
interrupt register (OTG_HS_GINTSTS) to determine host mode operation.
3. The application sets the reset bit (PRST in OTG_HS_HPRT) and the OTG_HS
controller issues a USB reset and enumerates the A-device for data traffic.
4. The OTG_HS controller continues the host role of initiating traffic, and when done,
suspends the bus by writing the Port suspend bit in the host port control and status
register.
5. In Negotiated mode, when the A-device detects a suspend, it disconnects and switches
back to the host role. The OTG_HS controller deasserts the DP pull down and DM pull
down in the PHY to indicate the assumption of the device role.
6. The application must read the current mode bit in the Core interrupt
(OTG_HS_GINTSTS) register to determine the host mode operation.
7. The OTG_HS controller connects, completing the HNP process.

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ST STM32F405 Specifications

General IconGeneral
BrandST
ModelSTM32F405
CategoryComputer Hardware
LanguageEnglish

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