Revision history RM0090
1730/1749 RM0090 Rev 18
15-May-2014
7
(continued)
FMC
Updated Figure 474: Synchronous multiplexed read mode waveforms - NOR,
PSRAM (CRAM). Updated DATLAT bits definition in Section : SRAM/NOR-Flash
chip-select timing registers 1..4 (FMC_BTR1..4).
Updated FMC_BWTRx register address offsets in Table 297: FMC register map.
DEBUG
Added revision code ‘3’ in Section : DBGMCU_IDCODE.
Table 315. Document revision history (continued)
Date Version Changes
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