RM0090 Rev 18 489/1749
RM0090 LCD-TFT controller (LTDC)
514
The R, G and B values and their own respective address are programmed through the
LTDC_LxCLUTWR register.
• In case of L8 and AL88 input pixel format, the CLUT has to be loaded by 256 colors. The
address of each color is configured in the CLUTADD bits in the LTDC_LxCLUTWR
register.
• In case of AL44 input pixel format, the CLUT has to be only loaded by 16 colors. The
address of each color must be filled by replicating the 4-bit L channel to 8-bit as follows:
– L0 (indexed color 0), at address 0x00
– L1, at address 0x11
– L2, at address 0x22
– .....
– L15, at address 0xFF
Color Frame Buffer Address
Every Layer has a start address for the color frame buffer configured through the
LTDC_LxCFBAR
register.
When a layer is enabled, the data is fetched from the Color Frame Buffer.
Color Frame Buffer Length
Every layer has a total line length setting for the color frame buffer in bytes and a number of
lines in the frame buffer configurable in the LTDC_LxCFBLR and LTDC_LxCFBLNR
register respectively.
The line length and the number of lines settings are used to stop the prefetching of data to
the layer FIFO at the end of the frame buffer.
• If it is set to less bytes than required, a FIFO underrun interrupt is generated if it has
been previously enabled.
• If it is set to more bytes than actually required, the useless data read from the FIFO is
discarded. The useless data is not displayed.
Color Frame Buffer Pitch
Every layer has a configurable pitch for the color frame buffer, which is the distance between
the start of one line and the beginning of the next line in bytes. It is configured through the
LTDC_LxCFBLR register.
Layer Blending
The blending is always active and the two layers can be blended following the blending
factors configured through the LTDC_LxBFCR register.
The blending order is fixed and it is bottom up. If two layers are enabled, first the Layer1 is
blended with the Background color, then the Layer2 is blended with the result of blended
color of Layer1 and the background. Refer to Figure 84.
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