ST STM32F405 User Manual

RM0090 Rev 18 495/1749
RM0090 LCD-TFT controller (LTDC)
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16.7.4 LTDC Total Width Configuration Register (LTDC_TWCR)
This register defines the accumulated number of Horizontal Synchronization, back porch,
Active and front porch pixels minus 1 (HSYNC Width + HBP + Active Width + HFP - 1) and
the accumulated number of Vertical Synchronization, back porch lines, Active and Front
lines minus 1 (VSYNC Height+ BVBP + Active Height + VFP - 1). Refer to Figure 82 and
Section 16.4: LTDC programmable parameters for an example of configuration.
Address offset: 0x14
Reset value: 0x0000 0000
16.7.5 LTDC Global Control Register (LTDC_GCR)
This register defines the global configuration of the LCD-TFT controller.
Address offset: 0x18
Reset value: 0x0000 2220
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
TOTALW[11:0]
rw rw rw rw rw rw rw rw rw rw rw rw
16 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
TOTALH[10:0]
rw rw rw rw rw rw rw rw rw rw rw
Bits 31:28 Reserved, must be kept at reset value
Bits 27:16 TOTALW[11:0]: Total Width (in units of pixel clock period)
These bits defines the accumulated Total Width which includes the Horizontal
Synchronization, Horizontal back porch, Active Width and Horizontal front porch pixels
minus 1.
Bits 15:11 Reserved, must be kept at reset value
Bits 10:0 TOTALH[10:0]: Total Height (in units of horizontal scan line)
These bits defines the accumulated Height which includes the Vertical Synchronization,
Vertical back porch, the Active Height and Vertical front porch Height lines minus 1.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
HSPOL VSPOL DEPOL PCPOL
Reserved
DEN
rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserve
d
DRW[2:0]
Reser
ved
DGW[2:0]
Reser
ved
DBW[2:0]
Reserved
LTDCEN
rrr rrr rrr rw

ST STM32F405 Specifications

General

Brand	ST
Model	STM32F405
Category	Computer Hardware
Language	English