RM0090 Rev 18 497/1749
RM0090 LCD-TFT controller (LTDC)
514
16.7.6 LTDC Shadow Reload Configuration Register (LTDC_SRCR)
This register allows to reload either immediately or during the vertical blanking period, the
shadow registers values to the active registers. The shadow registers are all Layer1 and
Layer2 registers except the LTDC_L1CLUTWR and the LTDC_L2CLUTWR.
Address offset: 0x24
Reset value: 0x0000 0000
Note: The shadow registers read back the active values. Until the reload has been done, the 'old'
value will be read.
16.7.7 LTDC Background Color Configuration Register (LTDC_BCCR)
This register defines the background color (RGB888).
Address offset: 0x2C
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
VBR IMR
rw rw
Bits 31:2 Reserved, must be kept at reset value
Bit 1 VBR: Vertical Blanking Reload
This bit is set by software and cleared only by hardware after reload. (it cannot be cleared
through register write once it is set)
0: No effect
1: The shadow registers are reloaded during the vertical blanking period (at the
beginning of the first line after the Active Display Area)
Bit 0 IMR: Immediate Reload
This bit is set by software and cleared only by hardware after reload.
0: No effect
1: The shadow registers are reloaded immediately
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
BCRED[7:0]
rw rw rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
BCGREEN[7:0] BCBLUE[7:0]
rw rw rw rw rw rw rw rw rw
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