ST STM32F405 User Manual

RM0090 Rev 18 509/1749
RM0090 LCD-TFT controller (LTDC)
514
Note: The Constant Alpha value, is the programmed value in the LxCACR register divided by 255
by hardware.
Example: Only layer1 is enabled, BF1 configured to Constant Alpha
BF2 configured to
1 - Constant Alpha
Constant Alpha: The Constant Alpha programmed in the LxCACR register is 240 (0xF0).
Thus, the Constant Alpha value is 240/255 = 0.94
C: Current Layer Color is 128
Cs: Background color is 48
Layer1 is blended with the background color.
BC = Constant Alpha x C + (1 - Constant Alpha
) x Cs = 0.94 x 128 + (1- 0.94) x 48 = 123.
16.7.22 LTDC Layerx Color Frame Buffer Address Register (LTDC_LxCFBAR)
(where x=1..2)
This register defines the color frame buffer start address which has to point to the address
where the pixel data of the top left pixel of a layer is stored in the frame buffer.
Address offset: 0xAC + 0x80 x (Layerx -1), Layerx = 1 or 2
Reset value: 0x0000 0000
16.7.23 LTDC Layerx Color Frame Buffer Length Register (LTDC_LxCFBLR)
(where x=1..2)
This register defines the color frame buffer line length and pitch.
Address offset: 0xB0 + 0x80 x (Layerx -1), Layerx = 1 or 2
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
CFBADD[31:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CFBADD[31:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 CFBADD[31:0]: Color Frame Buffer Start Address
These bits defines the color frame buffer start address.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
CFBP[12:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
CFBLL[12:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw

ST STM32F405 Specifications

General

Brand	ST
Model	STM32F405
Category	Computer Hardware
Language	English