ST STM32F405 User Manual

Advanced-control timers (TIM1 and TIM8) RM0090
588/1749 RM0090 Rev 18
Refer to Section 2.3: Memory map for the register boundary addresses.
0x2C
TIMx_ARR
Reserved
ARR[15:0]
Reset value 1111111 1 11111111
0x30
TIMx_RCR
Reserved
REP[7:0]
Reset value 00000000
0x34
TIMx_CCR1
Reserved
CCR1[15:0]
Reset value 0000000 0 00000000
0x38
TIMx_CCR2
Reserved
CCR2[15:0]
Reset value 0000000 0 00000000
0x3C
TIMx_CCR3
Reserved
CCR3[15:0]
Reset value 0000000 0 00000000
0x40
TIMx_CCR4
Reserved
CCR4[15:0]
Reset value 0000000 0 00000000
0x44
TIMx_BDTR
Reserved
MOE
AOE
BKP BKE
OSSR
OSSI
LOCK
[1:0]
DT[7:0]
Reset value 0000000 0 00000000
0x48
TIMx_DCR
Reserved
DBL[4:0]
Reserved
DBA[4:0]
Reset value 0000 0 00000
0x4C
TIMx_DMAR DMAB[31:0]
Reset value 00000000000000000000000 0 00000000
Table 96. TIM1 and TIM8 register map and reset values (continued)
Offset Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12
11
10
9 8 7 6 5 4 3 2 1 0

ST STM32F405 Specifications

General

Brand	ST
Model	STM32F405
Category	Computer Hardware
Language	English