EasyManuals Logo

ST STM32F405 User Manual

ST STM32F405
1749 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #1406 background imageLoading...
Page #1406 background image
USB on-the-go high-speed (OTG_HS) RM0090
1406/1749 RM0090 Rev 18
OTG_HS_DIEPEMPMSK 0x834
OTG_HS device IN endpoint FIFO empty interrupt mask register:
(OTG_HS_DIEPEMPMSK) on page 1454
OTG_HS_DEACHINT 0x838
OTG_HS device each endpoint interrupt register
(OTG_HS_DEACHINT) on page 1454
OTG_HS_DEACHINTMSK 0x83C
OTG_HS device each endpoint interrupt register mask
(OTG_HS_DEACHINTMSK) on page 1455
OTG_HS_DIEPEACHMSK1 0x844
OTG_HS device each in endpoint-1 interrupt register
(OTG_HS_DIEPEACHMSK1) on page 1455
OTG_HS_DOEPEACHMSK1 0x884
OTG_HS device each OUT endpoint-1 interrupt register
(OTG_HS_DOEPEACHMSK1) on page 1456
OTG_HS_DIEPCTLx
0x900
0x920
...
0x9A0
OTG device endpoint-x control register (OTG_HS_DIEPCTLx) (x =
0..5, where x = Endpoint_number) on page 1457
OTG_HS_DIEPINTx 0x908
OTG_HS device endpoint-x interrupt register
(OTG_HS_DIEPINTx) (x = 0..5, where x = Endpoint_number) on
page 1464
OTG_HS_DIEPTSIZ0 0x910
OTG_HS device IN endpoint 0 transfer size register
(OTG_HS_DIEPTSIZ0) on page 1467
OTG_HS_DIEPDMAx/
OTG_HS_DOEPDMAx
0x914/0xB14
OTG_HS device endpoint-x DMA address register
(OTG_HS_DIEPDMAx / OTG_HS_DOEPDMAx) (x = 0..5, where
x = Endpoint_number) on page 1471
OTG_HS_DTXFSTSx 0x918
OTG_HS device IN endpoint transmit FIFO status register
(OTG_HS_DTXFSTSx) (x = 0..5, where x = Endpoint_number) on
page 1470
OTG_HS_DIEPTSIZx
0x930
0x950
...
0x9B0
OTG_HS device endpoint-x transfer size register
(OTG_HS_DIEPTSIZx) (x = 1..5, where x = Endpoint_number) on
page 1469
OTG_HS_DOEPCTL0 0xB00
OTG_HS device control OUT endpoint 0 control register
(OTG_HS_DOEPCTL0) on page 1460
OTG_HS_DOEPSIZ0 0xB10
OTG_HS device OUT endpoint 0 transfer size register
(OTG_HS_DOEPTSIZ0) on page 1468
OTG_HS_DOEPCTLx
0xB20
0xB40
...
0xBA0
OTG_HS device endpoint-x control register
(OTG_HS_DOEPCTLx) (x = 1..5, where x = Endpoint_number) on
page 1461
Table 210. Device-mode control and status registers (continued)
Acronym
Offset
address
Register name

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ST STM32F405 and is the answer not in the manual?

ST STM32F405 Specifications

General IconGeneral
BrandST
ModelSTM32F405
CategoryComputer Hardware
LanguageEnglish

Related product manuals