ST STM32F405

RM0090 Rev 18 1441/1749
RM0090 USB on-the-go high-speed (OTG_HS)
1543
OTG_HS host channel-x interrupt mask register (OTG_HS_HCINTMSKx)
(x = 0..11, where x = Channel_number)
Address offset: 0x50C + 0x20 * x
Reset value: 0x0000 0000
This register reflects the mask for each channel status described in the previous section.
313029282726252423222120191817161514131211109876543210
Reserved
DTERRM
FRMORM
BBERRM
TXERRM
NYET
ACKM NAKM
STALLM
AHBERRM
CHHM
XFRCM
rw rw rw rw rw rw rw rw rw rw rw
Bits 31:11 Reserved, must be kept at reset value.
Bit 10 DTERRM: Data toggle error mask
0: Masked interrupt
1: Unmasked interrupt
Bit 9 FRMORM: Frame overrun mask
0: Masked interrupt
1: Unmasked interrupt
Bit 8 BBERRM: Babble error mask
0: Masked interrupt
1: Unmasked interrupt
Bit 7 TXERRM: Transaction error mask
0: Masked interrupt
1: Unmasked interrupt
Bit 6 NYET: response received interrupt mask
0: Masked interrupt
1: Unmasked interrupt
Bit 5 ACKM: ACK response received/transmitted interrupt mask
0: Masked interrupt
1: Unmasked interrupt
Bit 4 NAKM: NAK response received interrupt mask
0: Masked interrupt
1: Unmasked interrupt
Bit 3 STALLM: STALL response received interrupt mask
0: Masked interrupt
1: Unmasked interrupt