ST STM32F405

Flexible memory controller (FMC) RM0090
1606/1749 RM0090 Rev 18
Configuration registers
The FMC can be configured through a set of registers. Refer to Section 37.5.6, for a
detailed description of the NOR Flash/PSRAM controller registers. Refer to Section 37.6.8,
for a detailed description of the NAND Flash/PC Card registers and to Section 37.7.5 for a
detailed description of the SDRAM controller registers.
37.4 External device address mapping
From the FMC point of view, the external memory is divided into 6 fixed-size banks of
256 Mbyte each (see Figure 457):
• Bank 1 used to address up to 4 NOR Flash memory or PSRAM devices. This bank is
split into 4 NOR/PSRAM subbanks with 4 dedicated Chip Selects, as follows:
– Bank 1 - NOR/PSRAM 1
– Bank 1 - NOR/PSRAM 2
– Bank 1 - NOR/PSRAM 3
– Bank 1 - NOR/PSRAM 4
• Banks 2 and 3 used to address NAND Flash memory devices (1 device per bank)
• Bank 4 used to address a PC Card
• Bank 5 and 6 used to address SDRAM devices (1 device per bank).
For each bank the type of memory to be used can be configured by the user application
through the Configuration register.