Revision history RM0090
1726/1749 RM0090 Rev 18
15-Sep-2013
5
(continued)
USB OTG-FS:
Removed note related to VDD range limitation below Figure 387: OTG A-B device
connection and Figure 388: USB peripheral-only connection.
FSMC:
Updated Table 229, Table 232, Table 235, Table 239.
Replaced all occurences of DATALAT by DATLAT and SRAM/CRAM by
SRAM/PSRAM in the whole section.
Updated Section 36.1: FSMC main features. Changed bits 27 to 20 of
FSMC_BWTR1..4 to reserved.
Updated Section 36.6.7: PC Card/CompactFlash operations.
Updated WREN bit in Table 231, Table 232, Ta ble 233, Table 236, Table 239,
Table 242, Table 245, and Table 249.
Updated Section 36.5.4: NOR Flash/PSRAM controller asynchronous transactions,
Section : SRAM/NOR-Flash chip-select control registers 1..4 (FSMC_BCR1..4),
Section : SRAM/NOR-Flash chip-select timing registers 1..4 (FSMC_BTR1..4) and
Section : SRAM/NOR-Flash write timing registers 1..4 (FSMC_BWTR1..4).
Updated definition of PWID in Section : PC Card/NAND Flash control registers 2..4
(FSMC_PCR2..4).
FMC:
Updated TRDC definition in Section : SDRAM Timing registers 1,2
(FMC_SDTR1,2).
DEBUG: updated Figure 487: JTAG TAP connections.
Table 315. Document revision history (continued)
Date Version Changes
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