E5071C
1080
for the respective channels; for example, you can obtain the test result for
channel 15 from bit 1 and that for channel 16 from bit 2.
Every bit of the condition register is set to 0 after the event registers are
cleared by the *CLS. Upon completion of measurement, if the channel-wide
test result that combines the results for all traces in a channel is "fail," the
corresponding bit of the condition register is set to 1.
If the corresponding bit of the positive transition filter is set to 1 (preset
value), every bit of the event register is set to 1 when the corresponding
bit of the condition register changes from 0 to 1.
To retrieve the registers, use the following commands:
Questionable limit status register
Condition register
:STAT:QUES:LIM:COND?
Event register
:STAT:QUES:LIM?
Questionable limit extra status register
Condition register
:STAT:QUES:LIM:ELIM:COND?
Event register
:STAT:QUES:LIM:ELIM?
Obtaining test results for a channel (channel 1 in this example) using the status register