E5071C
1082
The condition register's bit 10 is set to 0 after the event registers are
cleared by the *CLS. Upon completion of measurement, this bit is set to 1
if the overall test result that combines the results for all channels is "fail."
If the positive transition filter's bit 10 is set to 1 (preset value), the event
register's bit 10 is set to 1 when the condition register's bit 10 changes
from 0 to 1.
To retrieve the condition register and event register under the questionable
status event register, use the following commands:
Condition register
:STAT:QUES:COND?
Event register
:STAT:QUES?
Obtaining overall test results using the status register
To Next Page
Loading...
Need help?
General
