EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 114
Universal Serial Bus (USB)
UIB->chgdet_intr = ~CY_U3P_UIB_CHGDET_INTR_DEFAULT;
UIB->chgdet_intr_mask = CY_U3P_UIB_OTG_ID_CHANGE;
/* Enable OTG mode and charger detection. */
UIB->otg_ctrl = (CY_U3P_UIB_OTG_ENABLE);
/* Enable ID pin detection. */
UIB->chgdet_ctrl = CY_U3P_UIB_ACA_ENABLE;
/* Enable the UIB interrupts. */
UIB->intr = ~CY_U3P_UIB_INTR_DEFAULT;
UIB->intr_mask = (CY_U3P_UIB_OTG_INT | CY_U3P_UIB_CHGDET_INT);
CyU3PVicEnableInt (CY_U3P_VIC_UIB_CORE_VECTOR);
/* Enable the VBUS interrupts. */
GCTL->iopwr_intr = ~CY_U3P_GCTL_IOPWR_INTR_DEFAULT;
GCTL->iopwr_intr_mask = CY_U3P_VBUS;
glUibDeviceInfo.vbusDetectMode = CY_U3P_VBUS;
CyU3PVicEnableInt (CY_U3P_VIC_GCTL_PWR_VECTOR);
}
else if (cfg->otgMode == CY_U3P_OTG_MODE_CARKIT_PPORT)
{
/* Enable the USB PHY connections. */
GCTLAON->control &= ~CY_U3P_GCTL_ANALOG_SWITCH;
/* Enable and set the EPM clock to bus clock (100MHz). */
GCTL->uib_core_clk = (CY_U3P_GCTL_UIBCLK_CLK_EN | CY_U3P_GCTL_UIB_CORE_CLK_DEFAULT);
GCTLAON->control |= CY_U3P_GCTL_USB_POWER_EN;
CyU3PBusyWait (100);
CyU3PUsbPowerOn ();
UIB->otg_ctrl = CY_U3P_UIB_OTG_CTRL_DEFAULT;
GCTL->iomatrix |= CY_U3P_CARKIT;
UIB->chgdet_ctrl = CY_U3P_UIB_CARKIT;
}
else if (cfg->otgMode == CY_U3P_OTG_MODE_CARKIT_UART)
{
/* Verify if the configuration is possible. */
if ((CyFx3DevIOIsSib8BitWide (1)) || (CyFx3DevIOIsUartConfigured ()))
{
return CY_U3P_ERROR_BAD_ARGUMENT;
}
/* Enable the USB PHY connections. */
GCTLAON->control &= ~CY_U3P_GCTL_ANALOG_SWITCH;
/* Enable and set the EPM clock to bus clock (100MHz). */
GCTL->uib_core_clk = (CY_U3P_GCTL_UIBCLK_CLK_EN | CY_U3P_GCTL_UIB_CORE_CLK_DEFAULT);
GCTLAON->control |= CY_U3P_GCTL_USB_POWER_EN;
CyU3PBusyWait (100);
CyU3PUsbPowerOn ();
UIB->otg_ctrl = CY_U3P_UIB_OTG_CTRL_DEFAULT;
GCTL->iomatrix &= ~CY_U3P_CARKIT;
UIB->chgdet_ctrl = CY_U3P_UIB_CARKIT;
}