EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 543
I2C_STATUS
0xE0000404
10.19.2 I2C_STATUS
I
2
C Status Register
Status and error register. Most status bits are used to generate an interrupt on positive edge into INTR register.
31 SDA_STAT Status of the SDA line.
30 SCL_STAT Status of the SCL line.
29 BUS_BUSY Asserts when the block has detected that it cannot start an operation (TX/RX) since the bus is kept
busy by another master. Deasserts and resets when a stop condition is detected or when the block is
disabled.
28 BUSY Indicates the block is busy transmitting data. This field may remain asserted after the block is sus-
pended and must be polled before changing any configuration values.
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I2C_STATUS I
2
C Status Register 0xE0000404
b31 b30 b29 b28 b27 b26 b25 b24
SDA_STAT SCL_STAT BUS_BUSY BUSY ERROR_CODE[3:0]
RRRRRRRR
WWWWWWWW
0000 0xF
I2C_STATUS I
2
C Status Register
b23 b22 b21 b20 b19 b18 b17 b16
I2C_STATUS I
2
C Status Register
b15 b14 b13 b12 b11 b10 b9 b8
ERROR
R/W1C
R/W1S
0
I2C_STATUS I
2
C Status Register
b7 b6 b5 b4 b3 b2 b1 b0
LOST_
ARBITRATION
TIMEOUT TX_HALF TX_SPACE TX_DONE RX_HALF RX_DATA RX_DONE
R/W1CR/W1CRRRRRR
R/W1SR/W1SWWWWWW
00110000
Bit Name Description