EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 71
FX3 DMA Subsystem
Refer to the section "Setting up the DMA System" in AN75779, where it is explained graphically in a high-level how the
socket, descriptor, and buffers are tied together in the FX3 DMA system.
5.5.8 Interrupt Requests
Each DMA-capable peripheral block has dedicated global interrupt request lines to the PL192 VIC. Refer to 2.3.1.8 Vectored
Interrupt Controller on page 40 for more details. Table 2-4 on page 41 in 2.3.1.8 Vectored Interrupt Controller on page 40 lists
the various FX3 interrupt sources. Ta b l e 5- 4 describes the DMA interrupt lines.
Table 5-4. Global DMA Interrupt Request to VIC
5.5.9 DMA Interrupts
Although DMA transfer takes place independently from CPU execution, the CPU may need to be notified when certain
transfer conditions are met, when an error has occurred, or when the transfer is complete. See SCK_INTR on page 623.
Each peripheral has a global SCK_INTR register, in which each bit represents the socket number that generates the interrupt.
The bit description is as described above. There is also a per-socket SCK_INTR in which each bit represents the interrupt
source from the corresponding socket. Bit description is explained in 5.5.5 Sockets on page 65. The logical OR of all socket
interrupts presented in the per-socket SCK_INTR register represents the corresponding bit in the peripheral global
SCK_INTR register. This is illustrated in Figure 5-10.
Figure 5-10. Global and Per-Socket SCK_INTR Register
When a DMA interrupt occurs, the CPU is notified by VIC with the DMA interrupt line specific to the peripheral, as shown in
Table 5-4. Then the CPU can check the peripheral's global SCK_INTR register to find the socket number that needs attention.
Interrupt VIC Line Interrupt Source Description
GPIF_DMA 6 GPIF DMA adapter DMA socket interrupt from the GPIF block
USB_DMA 8 USB DMA adapter
Applies to both USB device and host mode opera-
tion
STORAGE_DMA 11 Storage (SD/MMC) interface DMA adapter Applies only to FX3S devices
PERIPH_DMA 20 Serial peripheral block DMA adapter
Socket0
……..
src0
src1
srcx
SCK_INTR
.
.
.
.
.
GLOBALSCK_INTR
……..
int0
int1
intn
int0
int1
intn
PeripheralBlockA
Socket1
……..
src0
src1
srcx
SCK_INTR
Socketn
……..
src0
src1
srcx
SCK_INTR
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