EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 222
Storage Ports
CyFxSDIOUARTApplnSibCB (
uint8_t portId,
CyU3PSibEventType evt,
CyU3PReturnStatus_t status)
{
if (evt == CY_U3P_SIB_EVENT_INSERT)
{
/* Handle card insert event */
}
if (evt == CY_U3P_SIB_EVENT_REMOVE)
{
/* Handle card remove event */
}
}
9.6.3 Write Protection
The S0_WP/ S1_WP (SD write protection) on the S-port is used to connect to the WP microswitch of the SD/MMC card
connector. This pin internally connects to a CPU-accessible GPIO for firmware to detect the SD card write protection. Write
protection can be enabled using the writeProtEnable field of the structure passed to CyU3PSibSetIntfParams. If enabled.
GPIO 43 acts as S0_WP and GPIO52 acts as S1_WP.
9.6.4 SD/MMC CLOCK STOP
FX3S supports the stop clock feature, which can save power if the internal buffer is full when receiving data from the SD/
MMC/SDIO.
SDMMC_MODE_CFG. RD_STOP_CLK_EN enables the SIB to detect overflow and stop the clock to the SD/SDIO/MMC card
during data transfer.
SDMMC_MODE_CFG. WR_STOP_CLK_EN enables SIB to detect underflow and stop the clock to the SD/SDIO/MMC card
during data transfer.
Refer to 9.5.1.5 Sending SD/MMC/SDIO Commands on page 206 for the SDMMC_MODE_CFG register description.
9.6.5 SD_CLK Output Clock Stop
During the data transfer, the SD_CLK clock can be enabled (on) or disabled (stopped) at any time by the internal flow control
mechanism. The SD_CLK output frequency is dynamically configurable using a clock divisor from a system clock. Refer to
Setting the S-Port Clock on page 206.
9.6.6 SDIO Read-Wait/ Suspend-Resume Feature
FX3S supports the optional read-wait and suspend-resume features as defined in the SDIO specification version 2.00
(January 30, 2007).
9.6.6.1 Read-Wait
Host devices built to the SD physical specification control the SDCLK to stop the read data block output from a card executing
a multiple read command whenever the host cannot accept more data. During the time that the host has stopped the SDCLK,
a CMD52 cannot be issued. This limitation creates the problem that a host device built to the SD physical specification cannot
perform the I/O command during a multiple read cycle.
To eliminate this limitation, the SDIO specification adds the read-wait control to enable the host to issue CMD52 during a
multiple read cycle. Read-wait uses the DAT[2] line to allow the host to signal the card to temporarily halt the sending of read
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