EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 194
Low Performance Peripherals (LPP)
{
/* Store the interrupt handler function pointer. */
CyU3PRegisterGpioCallBack(irq);
/* If the boot firmware has left the GPIO block ON, do not reset it. */
if ((CyU3PLppGpioBlockIsOn () == CyFalse) || ((GPIO->lpp_gpio_power &
CY_U3P_LPP_GPI-
O_ACTIVE) == 0))
{
status = CyU3PGpioSetClock (clk_p);
/* Register the fact that GPIO has been started with the FX3 API library. */
status = CyU3PLppInit (CY_U3P_LPP_GPIO, CyU3PGpioInt_Handler);
/* Power the GPIO block ON, and wait for it to be active. */
GPIO->lpp_gpio_power &= ~(1 << 31);
CyU3PBusyWait (10);
GPIO->lpp_gpio_power |= (1 << 31);
while (!(GPIO->lpp_gpio_power & CY_U3P_LPP_GPIO_ACTIVE));
}
else
{
/* GPIO block is already ON. Just register the block with the FX3 API library. */
status = CyU3PLppInit (CY_U3P_LPP_GPIO, CyU3PGpioInt_Handler);
}
/* Update the status flag. */
glIsGpioActive = CyTrue;
}
8.9.4.2 Configure GPIO[45] as Input Pin and GPIO[21] as Output Pin
The I/O matrix needs to be configured to use simple and complex GPIOs. I/Os that are not configured for peripheral
interfaces can be used as GPIOs. This selection must be explicitly made. Otherwise, these lines will be configured per their
default function. This selection is made via four 32-bit bit masks, where each I/O is represented in C by (1 << IO number). In
this case, GPIO[45] is used as an input pin and is selected during the I/O matrix configuration. GPIO[21] is also used but
cannot be selected here, as it is part of the GPIF II I/Os (CTL4). If this I/O is not used with the GPIF II interface, it can be
overridden to become a GPIO by invoking the CyU3PDeviceGpioOverride call.
io_cfg.gpioSimpleEn[0] = 0; // bit positions 31:0
io_cfg.gpioSimpleEn[1] = 0x00002000; /* GPIO 45 */(bit positions 63:32)
io_cfg.gpioComplexEn[0] = 0;
io_cfg.gpioComplexEn[1] = 0;
CyU3PDeviceConfigureIOMatrix (&io_cfg);
The clock parameters for the GPIO block are defined using the CyU3PGpioInit API. Three clocks are associated with the FX3
GPIO core clock. The FAST clock is derived from the FX3 system clock, and its frequency is determined by the clkSrc and
fastClkDiv parameters. The SLOW clock is derived from the FAST clock, and its frequency is determined by the slowClkDiv
value. The operating clock for various complex GPIO timers can be selected from among the FAST clock, the SLOW clock,
and a fixed 32-kHz frequency. All simple GPIOs function (are updated or sampled) based on a separate clock, which is also
derived from the FAST clock. The frequency of this clock is determined by the simpleDiv value. The FAST clock is configured
as half of the system clock, and the SLOW clock is disabled (set to zero). Interrupt callback can be registered using
CyU3PGpioInit, but this example does not use it.
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