Cypress EZ-USB FX3 User Manual

EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 567
UART_INTR
0xE0000808
10.20.3 UART_INTR
UART Interrupt Request Register
Interrupt requests. Derived from STATUS register. Interrupt requests must be cleared by CPU and are generated regardless
of values in INTR_MASK register.
9 ERROR Set by hardware when corresponding STATUS asserts, cleared by software.
8 BREAK Set by hardware when corresponding STATUS asserts, cleared by software.
7 CTS_TOGGLE Set by hardware when corresponding STATUS asserts, cleared by software.
6CTS_STAT Set by hardware when corresponding STATUS asserts, cleared by software.
5TX_HALF Set by hardware when corresponding STATUS asserts, cleared by software.
4 TX_SPACE Set by hardware when corresponding STATUS asserts, cleared by software.
3 TX_DONE Set by hardware when corresponding STATUS asserts, cleared by software.
2 RX_HALF Set by hardware when corresponding STATUS asserts, cleared by software.
1 RX_DATA Set by hardware when corresponding STATUS asserts, cleared by software.
0 RX_DONE Set by hardware when corresponding STATUS asserts, cleared by software.
UART_INTR UART Interrupt Request Register 0xE0000808
b31 b30 b29 b28 b27 b26 b25 b24
UART_INTR UART Interrupt Request Register
b23 b22 b21 b20 b19 b18 b17 b16
UART_INTR UART Interrupt Request Register
b15 b14 b13 b12 b11 b10 b9 b8
ERROR BREAK
R/W1C R/W1C
R/W1S R/W1S
00
UART_INTR UART Interrupt Request Register
b7 b6 b5 b4 b3 b2 b1 b0
CTS_TOGGLE CTS_STAT TX_HALF TX_SPACE TX_DONE RX_HALF RX_DATA RX_DONE
R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C
R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S
00000000
Bit Name Description

Cypress EZ-USB FX3 Specifications

General

Brand	Cypress
Model	EZ-USB FX3
Category	Controller
Language	English