EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 638
SDMMC_RESP_REG2
0xFC
10.26.11 SDMMC_RESP_REG2
SDMMC Response Register2
Response data received from the card on the response pin. The response from bit 72 is placed in this register starting at the
MSB of the register. There are two copies of this register corresponding to the two storage ports. The address of each register
is calculated as 0xe0020018 + (port * 0x0400).
31:0 RESP Bits 72 to 103 of the command response from MSB to LSB.
SDMMC_RESP_REG2
SDMMC Command Response 2
0xE0020018
b31 b30 b29 b28 b27 b26 b25 b24
RESP[31:24]
RRRRRRRR
WWWWWWWW
00000000
b23 b22 b21 b20 b19 b18 b17 b16
RESP[23:16]
RRRRRRRR
WWWWWWWW
00000000
b15 b14 b13 b12 b11 b10 b9 b8
RESP[15:8]
RRRRRRRR
WWWWWWWW
00000000
b7 b6 b5 b4 b3 b2 b1 b0
RESP[7:0]
RRRRRRRR
WWWWWWWW
00000000
Bit Name Description