EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 201
Storage Ports
The interface clock frequency is divided down from the master system clock (384 MHz or 416 MHz) through a set of dividers.
The block supports clock frequencies ranging from 400-kHz to 104-MHz SDR (or 52-MHz DDR).
The storage controller supports stopping the interface clock to reduce power consumption when the interface is not in use. An
auto stop clock feature is supported to prevent data overflow during read operations. The clock automatically stops when the
internal buffer is full and restarts when a buffer is made available.
The storage controller supports card insertion and removal detection through one of two mechanisms:
â– Voltage change on the DAT[3] pin
â– Voltage change on a dedicated GPIO pin connected to a microswitch on the card socket
GPIO pins are used for resetting the eMMC devices and for checking the write protect status of the storage devices. These
pins operate under firmware control and do not directly affect the storage port operation.
The storage controller supports SDIO-specific features such as SDIO interrupt detection and the SDIO read-wait and
suspend-resume features, as specified in the SDIO specification version 2.00.
9.4 SD/ MMC/ SDIO Interface
9.4.1 SD/MMC Interface Overview
The SD bus includes the following signals:
â– CLK: Host to card clock signal
â– CMD: Bidirectional command/response signal
â– DAT0-DAT3: Four bidirectional data signals
â– VDD, VSS1, VSS2: Power and ground signals
The MMC bus includes these signals:
â– CLK: Host to card clock signal
â– CMD: Bidirectional command/response signal
â– DAT0-DAT7: Eight bidirectional data signals
â– VDD, VSS1, VSS2: Power and ground signals
The SD/MMC protocol is based on command and data bit streams that are initiated by a start bit and terminated by a stop bit.
Additionally, the SD/MMC controller provides a reference clock. Each message/operation is represented by one of the
following tokens:
â– Command: A token transmitted serially on the CMD pin that starts an operation. A command is sent from the host to a
card
â– Response: A token from the card transmitted serially on the CMD pin in response to certain commands, from the card to
the host.
â– Data: Data can be transferred via the data lines from the card to the host or vice versa. The number of data lines used for
the data transfer can be one (DAT0) or four (DAT0-DAT3) with the SD protocol and one (DAT0), four (DAT0-DAT3), or
eight (DAT0-DAT7) with the MMC protocol.
Figure 9-3, Figure 9-4, and Figure 9-5 show the possible bus operations in a normal working case. Note that the figures are
for illustrative purposes and use read operations in the MMC card as an example. Similar operations apply to the SD protocol
as well, with a change in data bus width.