Cypress EZ-USB FX3 User Manual

EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 30
Introduction to EZ-USB FX3
1.4.2 DMA
FX3 enables efficient and flexible DMA transfers between the various peripherals (such as USB, GPIF II, I2S, SPI, and
UART), requiring firmware only to configure data accesses between peripherals. The data transfers are managed by
distributed DMA controllers within each peripheral. For more information about the FX3 DMA interconnect, refer to the FX3
DMA Subsystem chapter on page 58.
1.4.3 USB Interface
The FX3 USB interface supports the following:
■ USB SuperSpeed and High-Speed peripheral functionality is compliant with USB 3.0 specification revision 1.0 and is
backward compatible with the USB 2.0 specification.
■ As a USB peripheral, FX3 supports SuperSpeed, High-Speed, and Full-Speed transfers. As a host, FX3 supports High-
Speed, Full-Speed, and Low-Speed transfers.
■ Complies with OTG Supplement revision 2.0, supporting dual-role operation. As an OTG host, FX3 supports
■ USB classes such as Mass Storage (MSC) and Human Interface Device (HID).
■ Carkit Pass-through UART functionality on USB D+/D- lines based on the CEA-936A specification
■ 16 IN and 16 OUT endpoints
■ CONTROL, BULK, INTERRUPT, and ISOCHRONOUS endpoints
■ USB 3.0 BULK streams feature
For more information about the USB block, refer to the Universal Serial Bus (USB) chapter on page 78.
1.4.4 GPIF II
The GPIF II is a programmable state machine that enables a flexible interface that may function either as a master or slave to
industry-standard or proprietary interfaces. The high-performance GPIF II interface provides functionality similar to, but more
advanced than, the FX2LP™ GPIF and Slave FIFO interfaces. Both parallel and serial interfaces may be implemented with
GPIF II.
The GPIF II implements an interface by creating a GPIF II state machine. GPIF II state transitions are based on input signals,
and the control output signals are driven as a result of the GPIF II state transitions. Some popular interfaces that can be
implemented with GPIF II are the Slave FIFO interface, SRAM, Address/Data bus interfaces, and Address Multiplexed
(ADMux) interfaces.
For more information about the synchronous Slave FIFO interface, refer to the application note AN65974 - Designing with the
EZ-USB FX3 Slave FIFO Interface.
The key features of GPIF II are:
■ Functions as a master or slave
■ Provides 256 firmware programmable states
■ Supports 8-bit, 16-bit, 24-bit, and 32-bit parallel data buses
■ Enables interface frequencies up to 100 MHz
■ Supports 14 configurable control pins when a 32-bit data bus is used. All control pins can be either input or outputor bidi-
rectional.
■ Supports 16 configurable control pins when a 16- or 8-bit data bus is used. All control pins can be either input or output or
bidirectional.
Cypress's GPIF II Designer tool enables GPIF II designs to be developed quickly and includes examples of common
interfaces. For more information about the GPIF II block, refer to the General Programmable Interface II (GPIF II) chapter on
page 120.

Cypress EZ-USB FX3 Specifications

General

Brand	Cypress
Model	EZ-USB FX3
Category	Controller
Language	English