Cypress EZ-USB FX3 User Manual

EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 536
I2S_EGRESS_DATA_RIGHT
0xE0000014
10.18.6 I2S_EGRESS_DATA_RIGHT
I2S Egress Data Register (Right)
Accepts egress data one sample at a time, LSB justified. Writing to this register adds one sample to the FIFO if the FIFO has
space available. It will result in ERROR if the FIFO is full. The size of the transmit FIFO is configured at design time.
31:0 DATA[31:0] Sample to be written to the peripheral in registered mode. Number of bits taken depends on sample
size (see I2S_CONFIG), other bits are ignored.
I2S_EGRESS_DATA_RIGHT I2S Egress Data Register (Right) 0xE0000014
b31 b30 b29 b28 b27 b26 b25 b24
DATA[31:24]
WWWWWWWW
RRRRRRRR
00000000
I2S_EGRESS_DATA_RIGHT I2S Egress Data Register (Right)
b23 b22 b21 b20 b19 b18 b17 b16
DATA[23:16]
WWWWWWWW
RRRRRRRR
00000000
I2S_EGRESS_DATA_RIGHT I2S Egress Data Register (Right)
b15 b14 b13 b12 b11 b10 b9 b8
DATA[15:8]
WWWWWWWW
RRRRRRRR
00000000
I2S_EGRESS_DATA_RIGHT I2S Egress Data Register (Right)
b7 b6 b5 b4 b3 b2 b1 b0
DATA[7:0]
WWWWWWWW
RRRRRRRR
00000000
Bit Name Description

Cypress EZ-USB FX3 Specifications

General

Brand	Cypress
Model	EZ-USB FX3
Category	Controller
Language	English