EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 583
SPI_INGRESS_DATA
0xE0000C14
10.21.6 SPI_INGRESS_DATA
SPI Ingress Data Register
Presents ingress data one word at a time, LSB justified. Reading from this register removes one word from the FIFO if the
FIFO has data available. It will result in ERROR if the FIFO is empty. The size of the receive FIFO is configured at design
time.
31:0 DATA32[31:0] Data word read from the peripheral when DMA_MODE=0. Only the least significant SPI_CONF.WL bits
are provided. Other bits are set to 0.
SPI_INGRESS_DATA SPI Ingress Data Register 0xE0000C14
b31 b30 b29 b28 b27 b26 b25 b24
DATA32[31:24]
WWWWWWWW
RRRRRRRR
00000000
SPI_INGRESS_DATA SPI Ingress Data Register
b23 b22 b21 b20 b19 b18 b17 b16
DATA32[23:16]
WWWWWWWW
RRRRRRRR
00000000
SPI_INGRESS_DATA SPI Ingress Data Register
b15 b14 b13 b12 b11 b10 b9 b8
DATA32[15:8]
WWWWWWWW
RRRRRRRR
00000000
SPI_INGRESS_DATA SPI Ingress Data Register
b7 b6 b5 b4 b3 b2 b1 b0
DATA32[7:0]
WWWWWWWW
RRRRRRRR
00000000
Bit Name Description