Cypress EZ-USB FX3 User Manual

EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 426
HOST_EP_INTR
0xE0032004
10.14.2 HOST_EP_INTR
Host End Point Interrupt Register
This register contains interrupt status bit for 32 EPs. CPU reads this register to determine, which EP has triggered interrupt.
31:16 EPI_IRQ_TOP[15:0] Interrupt Requests for IN endpoints 0..15 when the EP is deactivated by Host Controller.
15:8 EPO_IRQ_TOP[15:0] Interrupt Requests for OUT endpoints 0..15 when the EP is deactivated by Host Controller.
HOST_EP_INTR Host End Point Interrupt Register 0xE0032004
b31 b30 b29 b28 b27 b26 b25 b24
EPI_IRQ_TOP[15:8]
R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C
R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S
00000000
HOST_EP_INTR Host End Point Interrupt Register
b23 b22 b21 b20 b19 b18 b17 b16
EPI_IRQ_TOP[7:0]
R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C
R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S
00000000
HOST_EP_INTR Host End Point Interrupt Register
b15 b14 b13 b12 b11 b10 b9 b8
EPO_IRQ_TOP[15:8]
R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C
R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S
00000000
HOST_EP_INTR Host End Point Interrupt Register
b7 b6 b5 b4 b3 b2 b1 b0
EPO_IRQ_TOP[7:0]
R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C
R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S
00000000
Bit Name Description

Cypress EZ-USB FX3 Specifications

General

Brand	Cypress
Model	EZ-USB FX3
Category	Controller
Language	English