Cypress EZ-USB FX3 User Manual

EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 261
GCTL_UIB_CORE_CLK
0xE0052008
10.4.13 GCTL_UIB_CORE_CLK
UIB Clock Configuration Register
31 CLK_EN Enable clock multiplexer
3:2 PCLK_SRC[1:0] Clock source for SuperSpeed section of UIB block:
0 Not defined
1 USB3 PHY 125 MHz (spread spectrum clock)
2 Bus clock (typ 100 MHz)
3 Standby clock (typ 32 kHz)
This field drives a simple clock mux; the actual presence and configuration of the clock inputs used is
defined in the appropriate registers.
1:0 EPMCLK_SRC[1:0] Clock source for EPM section of UIB block:
0 USB2 PHY 480 MHz divided by 4 (120 MHz)
1 USB3 PHY 125 MHz (spread spectrum clock)
2 Bus clock (typ 100 MHz)
3 Standby clock (typ 32 kHz)
This field drives a simple clock mux; the actual presence and configuration of the clock inputs used is
defined in the appropriate registers.
Note In GTM test mode, make sure the USB2 PHY clock is running for at least 40 µs before selecting
EPMCLK_SRC = 0.
GCTL_UIB_CORE_CLK UIB Clock Configuration Register 0xE0052008
b31 b30 b29 b28 b27 b26 b25 b24
CLK_EN
R/W
R
0
GCTL_UIB_CORE_CLK UIB Clock Configuration Register
b23 b22 b21 b20 b19 b18 b17 b16
GCTL_UIB_CORE_CLK UIB Clock Configuration Register
b15 b14 b13 b12 b11 b10 b9 b8
GCTL_UIB_CORE_CLK UIB Clock Configuration Register
b7 b6 b5 b4 b3 b2 b1 b0
PCLK_SRC[1:0] EPMCLK_SRC[1:0]
R/W R/W R/W R/W
R R R R
2 2
Bit Name Description

Cypress EZ-USB FX3 Specifications

General

Brand	Cypress
Model	EZ-USB FX3
Category	Controller
Language	English