Cypress EZ-USB FX3 User Manual

EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 578
SPI_STATUS
0xE0000C04
10.21.2 SPI_STATUS
SPI Status Register
Status and error register. Most status bits are used to generate an interrupt on positive edge into INTR register.
28 BUSY Indicates the block is busy transmitting data. This field may remain asserted after the block is sus-
pended and must be polled before changing any configuration values.
27:24 ERROR_CODE Error code, only relevant when ERROR=1. ERROR logs only the FIRST error to occur and will never
change value as long as ERROR=1.
12 Write to TX FIFO when FIFO full
13 Read from RX FIFO when FIFO empty
15 No error
6 ERROR An internal error has occurred with cause ERROR_CODE. Must be cleared by software. Sticky
5TX_HALF Indicates that the TX FIFO is at least half empty. This bit can be used to create burst-based inter-
rupts. This bit is updated immediately after writes to EGRESS_DATA register. Non sticky.
4 TX_SPACE Indicates space is available in the TX FIFO. This bit is updated immediately after writes to EGRESS_-
DATA register. Non sticky.
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SPI_STATUS SPI Status Register 0xE0000C04
b31 b30 b29 b28 b27 b26 b25 b24
BUSY ERROR_CODE[3:0]
RRRRR
WWWWW
00xF
SPI_STATUS SPI Status Register
b23 b22 b21 b20 b19 b18 b17 b16
SPI_STATUS SPI Status Register
b15 b14 b13 b12 b11 b10 b9 b8
SPI_STATUS SPI Status Register
b7 b6 b5 b4 b3 b2 b1 b0
ERROR TX_HALF TX_SPACE TX_DONE RX_HALF RX_DATA RX_DONE
R/W1C R R R R R R
R/W1S W W W W W W
0110000
Bit Name Description

Cypress EZ-USB FX3 Specifications

General

Brand	Cypress
Model	EZ-USB FX3
Category	Controller
Language	English