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Cypress EZ-USB FX3 User Manual

Cypress EZ-USB FX3
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EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 647
SDMMC_CS
0xFC
10.26.19 SDMMC_CS
Card Command and Status Register
This register is used to initiate SD/MMC/SDIO commands and data transfers. There are two copies of this register corre-
sponding to the two storage ports. The address of each register is calculated as 0xe0020038 + (port * 0x0400).
31 EOP_EOT Configure end-of-packet signaling to DMA adapter.
0: Set EOP in the descriptor with last byte of last block during read.
1: Set EOP in the descriptor with last byte of every block.
28:24 SOCKET SIB socket number to be used for data read/write operation. Should be in the range 0–7.
15 SDIO_READ_WAIT_EN Enable Read Wait to SDIO device on DAT[2].
14 SDMMC_CLK_DIS Manual enable/disable for the SIB interface clock to enable power saving.
1: Clock is disabled
0: Clock is enabled
11 CLR_BOOTCMD FW writes ‘1’ to clear the BOOTCMD bit and abort boot operation.
HW writes ‘0’ after the BOOTCMD bit is cleared.
10 CLR_RDDCARD FW writes ‘1’ to clear the RDDCARD bit so that the next command can be issued.
This bit is cleared by HW when RDDCARD is cleared.
continued on next page
SDMMC_CS
SDMMC Command and Status
0xE0020038
b31 b30 b29 b28 b27 b26 b25 b24
EOP_EOT SOCKET[4:0]
R RRRRR
R/W
R/W R/W R/W R/W R/W
0
00000
b23 b22 b21 b20 b19 b18 b17 b16
b15 b14 b13 b12 b11 b10 b9 b8
SDIO_READ_WAI
T_EN
SDMMC_CLK_DI
S
CLR_BOOTCMD CLR_RDDCARD CLR_WRDCARD CLR_SNDCMD
RR R/W0C R/W0C R/W0C R/W0C
R/W R/W
R/W1S R/W1S R/W1S R/W1S
00
0000
b7 b6 b5 b4 b3 b2 b1 b0
CMDCOMP_DIS BOOTCMD RSTCONT RDDCARD WRDCARD SNDCMD
R/W0C R/W0C R/W0C R/W0CR/W0CR/W0C
R/W1S R/W1S R/W1S
R/W1S R/W1S R/W1S
000
000
Bit Name Description

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Cypress EZ-USB FX3 Specifications

General IconGeneral
BrandCypress
ModelEZ-USB FX3
CategoryController
LanguageEnglish

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