Cypress EZ-USB FX3 User Manual

EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 648
SDMMC_CS
0xFC
10.26.19 SDMMC_CS
9 CLR_WRDCARD FW writes ‘1’ to clear the WRDCARD bit so that the next command can be issued.
This bit is cleared by HW when WRDCARD is cleared.
8 CLR_SNDCMD FW writes ‘1’ to clear the SNDCMD bit so that the next command can be issued.
This bit is cleared by HW when SNDCMD is cleared.
7 CMDCOMP_DIS FW writes ‘1’ to send a Command Completion Disable signal to the CE-ATA device.
HW clears this bit after signal is sent.
6BOOTCMD FW writes ‘1’ to initiate a CMD_LINE_LOW boot or alternate boot command. For alternate boot, the
command should be sent by FW.
HW writes ‘0’ when NOBD blocks are transferred or when FW aborts the boot by writing ‘1’ to the
CLR_BOOTCMD bit.
5RSTCONT RSTCONT is used for error recovery.
FW writes ‘1’ to bring SIB state machines to a known state.
HW writes ‘0’ when the reset is completed.
Values of CFG registers are not affected by RSTCONT and only internal queues are flushed. If a
complete reset of SIB controller is required, then SIB_POWER.RESETN should be used.
2 RDDCARD FW writes ‘1’ to initiate data read from SD/MMC/SDIO peripheral.
HW writes ‘0’ when the transfer is completed.
FW may clear this bit by writing 1 to the CLR_RDDCARD bit.
1 WRDCARD FW writes ‘1’ to initiate data write to SD/MMC/SDIO peripheral.
HW writes ‘0’ when the transfer is completed.
FW may clear this bit by writing 1 to the CLR_WRDCARD bit.
0 SNDCMD FW writes ‘1’ to initiate sending of command.
HW writes ‘0’ when command is sent and the response, if any, is received.
FW may clear this bit on response timeout by writing 1 to CLR_SNDCMD bit.

Cypress EZ-USB FX3 Specifications

General

Brand	Cypress
Model	EZ-USB FX3
Category	Controller
Language	English