EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 234
VIC_INT_ENABLE
0xFFFFF010
10.3.5 VIC_INT_ENABLE
Interrupt Enable Register
31:0 INT_ENABLE[31:0] 1 Enable the interrupt at this bit position. All interrupts are disabled at reset. Software cannot
write 0 here to disable interrupts. Use the VIC_INT_CLEAR register for this purpose.
VIC_INT_ENABLE Interrupt Enable Register 0xFFFFF010
b31 b30 b29 b28 b27 b26 b25 b24
INT_ENABLE[31:24]
R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S
R R R R R R R R
0 0 0 0 0 0 0 0
VIC_INT_ENABLE Interrupt Enable Register
b23 b22 b21 b20 b19 b18 b17 b16
INT_ENABLE[23:16]
R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S
R R R R R R R R
0 0 0 0 0 0 0 0
VIC_INT_ENABLE Interrupt Enable Register
b15 b14 b13 b12 b11 b10 b9 b8
INT_ENABLE[15:8]
R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S
R R R R R R R R
0 0 0 0 0 0 0 0
VIC_INT_ENABLE Interrupt Enable Register
b7 b6 b5 b4 b3 b2 b1 b0
INT_ENABLE[7:0]
R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S R/W1S
R R R R R R R R
0 0 0 0 0 0 0 0
Bit Name Description