EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 565
UART_STATUS
0xE0000804
10.20.2 UART_STATUS
UART Status Register
Status and error register. Most status bits are used to generate an interrupt on positive edge into INTR register.
28 BUSY Indicates the block is busy transmitting data. This field may remain asserted after the block is sus-
pended and must be polled before changing any configuration values.
27:24 ERROR_CODE Error code, only relevant when ERROR=1. ERROR logs only the FIRST error to occur and will never
change value as long as ERROR=1.
0 Missing Stop bit
1 RX Parity error (received parity bit does not match RX_STICKY_BIT in sticky parity mode,
or the computed parity in non-sticky mode.)
12 Write to TX FIFO when FIFO full
13 Read from RX FIFO when FIFO empty
14 RX FIFO overflow or DMA Socket Overflow
15 No error
9 ERROR A protocol error has occurred with cause ERROR_CODE. Must be cleared by software. Sticky
8 BREAK Break condition is detected. Non sticky.
7 CTS_TOGGLE Set when CTS toggles.
continued on next page
UART_STATUS UART Status Register 0xE0000804
b31 b30 b29 b28 b27 b26 b25 b24
BUSY ERROR_CODE[3:0]
RRRRR
WWWWW
00xF
UART_STATUS UART Status Register
b23 b22 b21 b20 b19 b18 b17 b16
UART_STATUS UART Status Register
b15 b14 b13 b12 b11 b10 b9 b8
ERROR BREAK
R/W1C R
R/W1S W
00
UART_STATUS UART Status Register
b7 b6 b5 b4 b3 b2 b1 b0
CTS_TOGGLE CTS_STAT TX_HALF TX_SPACE TX_DONE RX_HALF RX_DATA RX_DONE
R/W1CRRRRRRR
R/W1SWWWWWWW
00110000
Bit Name Description