EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 452
EHCI_USBSTS
0xE0032064
10.14.25 EHCI_USBSTS
Host Controller States and Pending Interrupts Register
Pending interrupts and various states of the Host Controller
15 ASYNC_SHDL_ST Asynchronous Schedule Status
14 PER_SHDL_ST Periodic Schedule Status
13 RECLAMATION Reclamation
12 HC_HALTED This bit is a zero whenever the Run/Stop bit is a one. The HC sets this bit to one after it has stopped
executing as a result of the Run/Stop bit being set to 0 by software.
4 HOST_SYS_ERR Host System Error. EHCI over scheduling Status
2 PORT_CHNG_DET Port Change Detect
1 USBERRINT USB Error Interrupt
0USBINT USB Interrupt.
Note This field does not assert for SETUP+IN(STATUS) qTDs with no data phase. The workaround
is to use the HOST_EP_INTR[0] along with the transaction response that gets written into SRAM for
HCD.
EHCI_USBSTS Host Controller States and Pending Interrupts Register 0xE0032064
b31 b30 b29 b28 b27 b26 b25 b24
EHCI_USBSTS Host Controller States and Pending Interrupts Register
b23 b22 b21 b20 b19 b18 b17 b16
EHCI_USBSTS Host Controller States and Pending Interrupts Register
b15 b14 b13 b12 b11 b10 b9 b8
ASYNC_SHDL_ST PER_SHDL_ST RECLAMATION HC_HALTED
RRRR
R/w R/W R/W R/W
0001
EHCI_USBSTS Host Controller States and Pending Interrupts Register
b7 b6 b5 b4 b3 b2 b1 b0
HOST_SYS_ERR
PORT_CHNG_
DET
USBERRINT USBINT
R/W1C R/W1C R/W1C R/W1C
R/W1S R/W1S R/W1S R/W1S
0 000
Bit Name Description
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