EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 574
UART_ID
0xE0000BF0
10.20.10 UART_ID
Block Identification and Version Number Register
Every low performance peripheral IP block will implement a few MMIO registers at a fixed offset in its MMIO to space that
identify the block and control its power/clock/reset state. These registers are located in the CPU/Interconnect power and clock
domains and are accessible even when power/clock of the block is switched off.
31:16 BLOCK_VERSION[15:0] Version number for the IP
15:0 BLOCK_ID[15:0] A unique number identifying the IP in the memory space
I2C_ID Block Identification and Version Number 0xE0000BF0
b31 b30 b29 b28 b27 b26 b25 b24
BLOCK_VERSION[15:8]
RRRRRRRR
I2C_ID Block Identification and Version Number
b23 b22 b21 b20 b19 b18 b17 b16
BLOCK_VERSION[7:0]
RRRRRRRR
0x0001
I2C_ID Block Identification and Version Number
b15 b14 b13 b12 b11 b10 b9 b8
BLOCK_ID[15:8]
RRRRRRRR
I2C_ID Block Identification and Version Number
b7 b6 b5 b4 b3 b2 b1 b0
BLOCK_ID[7:0]
RRRRRRRR
0x0002
Bit Name Description
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