EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 34
2. FX3 CPU Subsystem
The EZ-USB FX3 device has an embedded 32-bit ARM926EJ-S core that delivers a processing capability up to 220 MIPS.
This ARM core is coupled with instruction and data caches, Tightly Coupled Memories (TCM), and a PL192 vectored interrupt
controller (VIC). FX3 also implements the standard ARM JTAG Test Access Point (TAP), which allows you to use standard
JTAG debuggers to debug firmware applications.
The ARM926EJ-S processor is targeted at multitasking applications and can support high-performance and low-power
requirements.
Interrupts in the FX3 device are managed through the standard ARM PL192 VIC block.
2.1 Features
The ARM9 core in the FX3 device supports the following features:
â– Operation at frequencies up to 200 MHz
â– Support for both 32-bit ARM and 16-bit thumb instructions
â– Integrated data and instruction caches of 8 KB each
â– Dedicated instruction and data TCMs for guaranteed low-latency memory access
â– VIC capable of managing 32 internal interrupt sources with programmable interrupt priorities
â– Standard ARM JTAG interface for debugging
â– Clock frequency control for power saving
â– System RAM on FX3 device serves as main storage for code and data