Cypress EZ-USB FX3 - Vic_Address

EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 239
VIC_ADDRESS
0xFFFFFF00
10.3.10 VIC_ADDRESS
Active ISR Address Register
This register returns the ISR address of the interrupt deemed active after masking and priority resolution. This is what the
CPU reads when interrupted.
31:0 ACTIVE_ISR[31:0] Upon interruption, software reads this register. This marks the active interrupt as being serviced,
which prevents interrupts of equal or lower priority from raising interrupt. Upon completion, the soft-
ware writes any value to this register, which clears the active interrupt. software does not access this
register at any other time.
VIC_ADDRESS Active ISR Address Register 0xFFFFFF00
b31 b30 b29 b28 b27 b26 b25 b24
ACTIVE_ISR[31:24]
R/W R/W R/W R/W R/W R/W R/W R/W
R/W R/W R/W R/W R/W R/W R/W R/W
0 0 0 0 0 0 0 0
VIC_ADDRESS Active ISR Address Register
b23 b22 b21 b20 b19 b18 b17 b16
ACTIVE_ISR[23:16]
R/W R/W R/W R/W R/W R/W R/W R/W
R/W R/W R/W R/W R/W R/W R/W R/W
0 0 0 0 0 0 0 0
VIC_ADDRESS Active ISR Address Register
b15 b14 b13 b12 b11 b10 b9 b8
ACTIVE_ISR[15:8]
R/W R/W R/W R/W R/W R/W R/W R/W
R/W R/W R/W R/W R/W R/W R/W R/W
0 0 0 0 0 0 0 0
VIC_ADDRESS Active ISR Address Register
b7 b6 b5 b4 b3 b2 b1 b0
ACTIVE_ISR[7:0]
R/W R/W R/W R/W R/W R/W R/W R/W
R/W R/W R/W R/W R/W R/W R/W R/W
0 0 0 0 0 0 0 0
Bit Name Description