EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 211
Storage Ports
The following is the code for performing reads and writes to/from the SD/MMC device.
/* Initiating Write to SD/ MMC card */
status = CyU3PDmaChannelSetXfer (&glChHandleMscOut, (numBlks *
CY_FX_SIB_MAX_BLOCK_SIZE));
if (status == CY_U3P_SUCCESS)
{
status = CyU3PSibReadWriteRequest (CY_FX_SIB_WRITE, ((lun >= CY_FX_SIB_PARTITIONS)
? 1 : 0), glLunUnit[lun], numBlks, startAddr, 0);
if (status != CY_U3P_SUCCESS)
{
/* Abort the DMA Channel */
CyU3PDmaChannelReset (&glChHandleMscIn);
}
}
/* Initiating Read from SD/ MMC card */
status = CyU3PDmaChannelSetXfer (&glChHandleMscIn, (numBlks *
CY_FX_SIB_MAX_BLOCK_SIZE));
if (status == CY_U3P_SUCCESS)
{
status = CyU3PSibReadWriteRequest (CY_FX_SIB_READ, ((lun >= CY_FX_SIB_PARTITIONS) ?
1 : 0), glLunUnit[lun], numBlks, startAddr, 1);
if (status != CY_U3P_SUCCESS)
{
/* Abort the DMA Channel */
CyU3PDmaChannelReset (&glChHandleMscIn);
}
}
CyU3PSibReadWriteRequest initiates a read/write data request. This function is used to initiate a read/write request to a
storage device. The open-ended read/write commands (CMD18 and CMD25) are used in all cases.
Inside this API, the block length and number of blocks, calculated from the parameters passed to it, are set in the appropriate
registers: SDMMC_BLOCKLEN and SDMMC_BLOCK_COUNT.
For bit definitions, refer to SDMMC_BLOCK_COUNT register on page 642.
The active SIB socket number for read/write is set using SDMMC_CS.SOCKET before initiating reads/writes from/to the SD/
MMC device. The DAT0 pin state can be monitored to learn the storage device busy state by polling for the bit
SDMMC_SATUS.DAT0_STAT. Before starting the command transmission involving the data phase, the
SDMMC_STATUS.DATA_SM_BUSY bit is polled to learn if the data state machine is busy. If so, the SIB is reset by setting the
SDMMC_CS.RSTCONT bit and then polled for it to become 0. Hardware writes 0 when reset is complete.
Before initiating any command transmission involving data through DAT[0:3] for SD or DAT[0:7] for MMC, the
DAT3_CHANGE interrupt is disabled by setting the SDMMC_INTR_MASK.DAT3_CHANGE bit. The interrupt is enabled
again after command completion. Then command transmission is initiated and completed in the same manner as described
in 9.5.1.5 Sending SD/MMC/SDIO Commands on page 206.
In a read operation (MULTI BLOCK read command CMD18), the command transmission is initiated by setting the bits
SDMMC_CS. SNDCMD and SDMMC_CS. RDDCARD.
The CY_U3P_SIB_EVENT_XFER_CPLT event is sent to the caller through the register storage callback function when the
specified amount of data has been completely transferred. This event is triggered based on the bits
SDMMC_INTR.BLOCK_COMP and SDMMC_INTR.BLOCKS_RECEIVED.
The socket number to be passed as a parameter to the function CyU3PSibReadWriteRequest is the offset with respect to
CY_U3P_SIB_SOCKET_0. For example, if CY_U3P_SIB_SOCKET_1 is used to create the DMA channel, then the socket
To Next Page
Loading...
Need help?
General
