EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 252
GCTL_IOPOWER
0xE0051030
10.4.7 GCTL_IOPOWER (continued)
19:18 REG_CARKIT_SEL[1:0] Defines the output value of the 3.3-V regulator output. All values other than the default are
for characterization and future use. This must not be used by software/firmware.
00 Default output of the 3.3-V regulator
01 Regulator output is nominal 3.0 V (experimental)
10 Regulator output is nominal 2.7 V (experimental)
11 Not allowed
17:16 USB_REGULATOR_TRIM[1:0] Trim value for USB Main Regulator output voltage. See USB I/O Subsystem for more
details.
13 USB_POWER_GOOD Indicates that internal supplies of the regulator are stable. For debug purposes:
0 Internal power is not stable
1 Internal power is stable
12 VBUS_TH Vbus level detected by regulator. The interrupt associated with this can be used to detect
the over current condition when using an A-device.
0 Vbus not detected to be < 4.1 V
1 Vbus detected to be > 4.4 V
11 VBAT Indicates VBAT voltage is present and within operating range. Internal regulator voltages
may not yet be stable when this pin asserts.
10 VBUS Indicates VBUS voltage is present and within operating range. Internal regulator voltages
may not yet be stable when this pin asserts.
9 USB25REG Indicates internal 2.5-V regulated voltage to USB2 PHY is present and stable.
8 USB33REG Indicates internal 3.3-V regulator is present and stable.
7VIO5 Indicates all I/O power domains for this block are powered and active. Any time needed for
internal voltages to stabilize cells to become active has passed before this bit asserts.
6 CVDDQ Indicates all I/O power domains for this block are powered and active. Any time needed for
internal voltages to stabilize cells to become active has passed before this bit asserts.
Note CVDDQ is required for chip operation (clock and reset). This bit will always be 1 when
it can be accessed.
5 EFVDDQ Indicates the eFuse programming voltage pin is supplied with either 1.2 V or 2.5 V. The
presence of programming voltage at 2.5 V is not detectable. Programming will fail but read-
ing succeeds when supplying this pin with 1.2 V.
4VIO4 Indicates all I/O power domains for this block are powered and active. Any time needed for
internal voltages to stabilize cells to become active has passed before this bit asserts.
3VIO3 Indicates all I/O power domains for this block are powered and active. Any time needed for
internal voltages to stabilize cells to become active has passed before this bit asserts.
2VIO2 Indicates all I/O power domains for this block are powered and active. Any time needed for
internal voltages to stabilize cells to become active has passed before this bit asserts.
0VIO1 Indicates all I/O power domains for this block are powered and active. Any time needed for
internal voltages to stabilize cells to become active has passed before this bit asserts.
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