Cypress EZ-USB FX3 User Manual

EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 264
GCTL_GPIO_FAST_CLK
0xE0052018
10.4.15 GCTL_GPIO_FAST_CLK (continued)
3:0 DIV[3:0] Clock divider value. This determines how much to divide the PLL system clock. The actual divider is
DIV + 1. Zero (divide by 1) is illegal and results in undefined behavior. In other words, the range of
divider values is 2 to 16.
Note Any two writes to GCTL_GPIO_FAST_CLK and GPIO_SLOW_CLK must be spaced at least 35cy @ busclk apart. This
holds for back-to-back writes to the same register as well as writes to both of these registers in either order.

Cypress EZ-USB FX3 Specifications

General

Brand	Cypress
Model	EZ-USB FX3
Category	Controller
Language	English