EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 628
SCK_INTR
0x00
10.26.1 SCK_INTR (continued)
The SCK_INTR registers contain the interrupt request bits for each socket in the respective IP, which is the logical OR of all
interrupt request bits in each socket. This register is read-only – interrupt bits are cleared by clearing the interrupt cause or bit
in the socket itself.
255:0 SCKINTR[255:0] Socket <x> asserts interrupt when bit <x> is set in this vector. Multiple bits may be set to 1
simultaneously.
This register is only as wide as the number of sockets in the adapter; 256 is just the maximum width.
All other bits always return 0.
Bit Name Description