Cypress EZ-USB FX3 User Manual

EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 67
FX3 DMA Subsystem
■ SCK_STATUS on page 609
■ SCK_INTR on page 612
■ SCK_INTR_MASK on page 614
Each socket can be identified to be in one of the states listed in Ta bl e 5 - 2 . The SCK_STATUS.STATE field can be read to
understand the socket state. More on the socket states will be discussed later.
Table 5-3. Socket States
The following C code example shows the DMA socket data structure used in the FX3 SDK.
/** \brief DMA socket register structure.
**Description**\n
Each hardware block on the FX3 device implements a number of DMA sockets through
which it handles data transfers with the external world. Each DMA socket serves as
an endpoint for an independent data stream going through the hardware block.
Each socket has a set of registers associated with it, that reflect the configuration
and status information for that socket. The CyU3PDmaSocket structure is a replica
of the config/status registers for a socket and is designed to perform socket configura-
tion
and status checks directly from firmware.
See the sock_regs.h header file for the definitions of the fields that make up each
of these registers.
**\see
*\see CyU3PDmaSocketConfig_t
*/
typedef struct CyU3PDmaSocket_t
{
uvint32_t dscrChain; /**< The descriptor chain associated with the socket
*/
uvint32_t xferSize; /**< The transfer size requested for this socket. The
size can
be specified in bytes or in terms of number of
buffers,
depending on the UNIT field in the status value. */
uvint32_t xferCount; /**< The completed transfer count for this socket. */
uvint32_t status; /**< Socket configuration and status register. */
Socket State
SCK_STATUS.STATE
Value
Description
DESCR 0
Descriptor state. This is the default initial state indicating the descriptor registers are NOT valid in the
adapter. The adapter will start loading the descriptor from the memory if the socket becomes enabled and
not suspended. Suspend has no effect on any other state.
STALL 1 Stall state. The socket is stalled, waiting for data to be loaded into the Fetch Queue or waiting for an event.
ACTIVE 2 Active state. The socket is available for core data transfers.
EVENT 3
Event state. Core transfer is done. The descriptor is being written back into the memory and an event is
being generated if enabled.
CHECK1 4
Check states. An active socket gets here based on the core's EOP request to check the transfer size and
determine whether the buffer should be wrapped up. Depending on result, the socket will either go back to
the Active state or move to the Event state.
SUSPENDED 5 The socket is suspended
CHECK2 6
Check states. An active socket gets here based on the core's EOP request to check the transfer size and
determine whether the buffer should be wrapped up. Depending on result, the socket will either go back to
the Active state or move to the Event state.
WAITING 7 Waiting for confirmation that the event was sent.

Cypress EZ-USB FX3 Specifications

General

Brand	Cypress
Model	EZ-USB FX3
Category	Controller
Language	English