NEC Electra Elite IPK - Master Clock Selection

2 - 242 Memory Blocks
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Document Revision 4 Electra Elite IPK
1-8-33 Master Clock Selection
General Description
When a DTI-U( ) ETU (T-1), PRT(1)-U( ) ETU, or BRT(4)-U( ) ETU is installed,
clocking must be synchronized. When this Memory Block is set for Cabinet 0 (default),
the system is set to be a Master Clock source. Programming this Memory Block
defines the system to be a slave from its connected source.
 When the master clock selection is changed, press the Reset switch on the CPU to reset the
system.
Display
Example 1: (Elite 100 is Master Clock Source)
Programming Procedures
1 Go off-line.
2 Press LK1 + LK8 +
CC to access the Memory Block.
3
Use dial pad to enter number of digits
.
 Use the following to enter data:
K ~ I to enter digits
J to move cursor left
L to move cursor right
Default Values
Cabinet 0 (Master System)
4 Press G to write the data. The next Memory Block is displayed.
5 Program next Memory Block or press
E to go back on-line.
System Mode
1
Submode
8
Data No.
33
PC Programming
¦ +AD
Data
No.
3 3 : M S T R C L C K 0 :
T I M E D I S P L A Y
Cabinet
0~3
Title
Slot
1~8
Electra Elite
Electra Elite Electra Elite
DTI
Cabinet 1
Slot 1
DTI
Cabinet 1
Slot 1
DTI
Cabinet 1
Slot 4
DTI
Cabinet 1
Slot 1
T1
T1
Cabinet 0
Master
Cabinet 1
Slot 1
(Slave)
Cabinet 1
Slot 1
(Slave)
MB 1-8-33
Setting
(100)
(200)
(300)