Programming
1147
summary) channel 8 status event
register is set to "1."
9
Channel 9 Ripple Test Fail
(questionable ripple limit
channel 9 status register
summary)
Set to "1" while one of the
enabled bits in the
questionable ripple limit
channel 9 status event
register is set to "1."
10
Channel 10 Ripple Test
Fail (questionable ripple
limit channel 10 status
register summary)
Set to "1" while one of the
enabled bits in the
questionable ripple limit
channel 10 status event
register is set to "1."
11
Channel 11 Ripple Test
Fail (questionable ripple
limit channel 11 status
register summary)
Set to "1" while one of the
enabled bits in the
questionable ripple limit
channel 11 status event
register is set to "1."
12
Channel 12 Ripple Test
Fail (questionable ripple
limit channel 12 status
register summary)
Set to "1" while one of the
enabled bits in the
questionable ripple limit
channel 12 status event
register is set to "1."
13
Channel 13 Ripple Test
Fail (questionable ripple
limit channel 13 status
register summary)
Set to "1" while one of the
enabled bits in the
questionable ripple limit
channel 13 status event
register is set to "1."
14
Channel 14 Ripple Test
Fail (questionable ripple
limit channel 14 status
register summary)
Set to "1" while one of the
enabled bits in the
questionable ripple limit
channel 14 status event
register is set to "1."
15 Not used Always 0
Issuing the *CLS command will clear all bits from the questionable ripple
limit status event register.