Index
Index-6 Élan™SC520 Microcontroller User’s Manual
DGP bit field, 12-7
DMA Buffer Chaining Interrupt Mapping
(DMABCINTMAP) register
function, 14-4, 15-5
DMA.
See
GP-DMA controller.
DMABCINTMAP register, 15-5
documentation, xxiv
Élan™SC520 microcontroller documentation, xxiv
literature ordering, iii, xxv
world wide web site, iii, xxv
documentation conventions, xxv
Documentation Notation table, xxv
DR bit field, 21-7
DRAM.
See
SDRAM controller.
DRCBENDADR register, 10-10
DRCCFG register, 10-10
DRCCTL register, 10-10
DRCTMCTL register, 10-10
Drive Strength Control (DSCTL) register
function, 10-10, 23-4
usage, 10-19
DSCTL register, 23-4
DSR2
–DSR1 signals
control, 13-6, 21-2, 21-3, 21-4
description, 2-9, 21-6
usage, 21-2
DTR2
–DTR1 signals
control, 21-4
description, 2-9, 21-6
usage, 21-2, 21-9
E
ECC Check Bit Position (ECCCKBPOS) register
function, 10-10
usage, 10-28
ECC Check Code Test (ECCCKTEST) register
function, 10-10, 24-2
usage, 10-17, 24-11
ECC Control (ECCCTL) register
function, 10-10
usage, 10-27
ECC Interrupt Mapping (ECCMAP) register
function, 10-10, 15-4
ECC Multi-Bit Error Address (ECCMBADD) register
function, 10-10, 24-2
usage, 10-28
ECC Single-Bit Error Address (ECCSBADD) register
function, 10-10, 24-2
usage, 10-28
ECC Status (ECCSTA) register
function, 10-10
usage, 10-27
ECC.
See
SDRAM controller.
ECC_CHK_POS bit field, 10-28
ECCCKBPOS register, 10-10
ECCCKTEST register, 10-10
ECCCTL register, 10-10
ECCMAP register, 15-4
ECCMBADD register, 10-10
ECCSBADD register, 10-10
ECCSTA register, 10-10
Élan™SC520 microcontroller
applications, 1-8
digital set top box, 1-9
smart residential gateway, 1-8
telephone line concentrator, 1-9
thin client, 1-8
architectural overview, 1-4
address-mapping, 1-5
AMDebug™ technology, 1-4
clock generation, 1-6
general-purpose (GP) bus interface, 1-6
integrated peripherals, 1-7
JTAG boundary scan test interface, 1-7
PCI bus interface, 1-5
ROM/Flash controller, 1-5
SDRAM controller, 1-5
system testing and debugging features, 1-8
x86 architecture, 1-4
block diagram, 1-2
crystal specifications, xxiv
customer support, iii
distinctive characteristics, 1-1
logic diagram by default pin function, 2-3
logic diagram by interface, 2-2
package dimensions, xxiv
pin designations, xxiv
register descriptions, xxiv
thermal characteristics, xxiv
timing, xxiv
ÉlanSC520 Microcontroller Revision ID (REVID)
register
function, 7-1
usage, 25-14
EMSI bit field, 21-9
ENABLE bit field, 4-12, 4-17, 9-10, 9-11
ENB bit field, 19-3, 19-4, 19-6
ENH_MODE_ENB bit field, 14-10
Enter AMDebug Mode signal.
See
DEBUG_ENTER
signal.
EPS bit field, 21-8
ERR_IN_FIFO bit field, 21-8
EXP_SEL bit field, 5-8, 19-4
EXT_CLK bit field, 17-3
external oscillator, 2-10, 5-5
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