EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 225
Storage Ports
The boot's acknowledge can be disabled by setting the EXT_CSD register in the card. The boot operation can be terminated
by the host by pulling the CMD line HIGH. The termination can occur during data transfer or between consecutive data
blocks. The host does not interpret between them. Writing 1 to SDMMCU_CS.CLR_BOOTCMD causes the CPU to terminate
the boot and return to IDLE. Figure 9-14 depicts the flow chart for normal boot.
Figure 9-14. Flowchart for Normal Boot
The CPU may terminate a boot due to a CRC error or boot ack timeout. In a boot termination during data transfer, the CPU
has to bring the SIB FSMs to a known state by setting the RSTCONT bit in the SDMMCU_CS register and also ensure that
the associated sockets are brought back to a known state. More details on normal boot operation can be found in the SD 3.0
specification.
In alternate boot operation mode, If CMD0 is issued with argument 0XFFFFFFFA, 74 clock cycles after power up or reset, the
card sends the boot acknowledgement status followed by the boot data. The boot acknowledgment can be disabled as in the
case of normal boot. The termination of boot operation is triggered by issuing a reset command (CMD0 with argument
0XF0F0F0F0). As in the case of normal boot, the termination can occur during block boundary or data transfer. The condition
for termination described previously for normal boot is the same for alternate boot.
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