EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 358
GPIF_RIGHT_WAVEFORM
0xE0016000
10.7.45 GPIF_LEFT_WAVEFORM (continued)
This area stores the so-called right edge state transitions from a given state. Location 17 stores the right state transition from
state 17, and so on. This is a logical register implemented in 256x96b SRAM aligned on 128b boundaries. In other words the
right state transition for state 17 is stored in three 32-bit words at offset+4*17, offset+4*17+1, offset+4*17+2.
127:96 UNUSED This entry is unused and does not map to RAM in the current implementation.
Writes are ignored and reads will return 0 in all cases.
95 VALID 0 Entry not valid. (Not programmed or edge does not exist)
1 This entry is valid.
94 BETA_DEASSERT 0 Keep betas asserted throughout the state
1 Deassert after asserting for exactly one clock cycle, irrespective of how many cycles the
state is active.
The normal (deassert) state of user defined betas is defined in GPIF_CTRL_BUS_DEFAULT. The
normal state of internal betas is fixed by hardware. This function is applied only to betas selected in
GPIF_BETA_DEASSERT.
93:86 REPEAT_COUNT[7:0] Number of times to stay in this state – 1
85:54 Beta[31:0] 32 secondary outputs
53:46 Alpha_Right[7:0] For the right edge
45:38 Alpha_Left{7:0] Primary outputs for the left edge of the next state.
37:33 f1[4:0] Index to select the second transition function from a choice of 32 functions. Truth-tables for the 32 4-
bit functions are defined using the GPIF_FUNCTION registers.
32:28 f0[4:0] Index to select the first transition function from a choice of 32 functions. Truth-tables for the 32 4-bit
functions are defined using the GPIF_FUNCTION registers.
27:23 Fd[4:0] Fourth input index
22:18 Fc[4:0] Third input index.
17:13 Fb[4:0] Second input index.
12:8 Fa[4:0] Index to select the first input for transition functions out of 32 choices.
7:0 NEXT_STATE[7:0] Next state on left transition
GPIF_RIGHT_WAVEFORM Right Edge Waveform Memory Register
b15 b14 b13 b12 b11 b10 b9 b8
Fb[2:0] Fa[4:0]
R/W R/W R/W R/W R/W R/W R/W R/W
RRRRRRRR
00000000
GPIF_RIGHT_WAVEFORM Right Edge Waveform Memory Register
b7 b6 b5 b4 b3 b2 b1 b0
NEXT_STATE[7:0]
R/W R/W R/W R/W R/W R/W R/W R/W
RRRRRRRR
00000000
Bit Name Description
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