Cypress EZ-USB FX3 - Page 4

EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 4
Contents
2.3.1.1 Processor Modes.........................................................................................36
2.3.1.2 Processor Registers ....................................................................................37
2.3.1.3 Exception Vectors........................................................................................38
2.3.1.4 MMU ............................................................................................................38
2.3.1.5 Cache Memories .........................................................................................39
2.3.1.6 Tightly Coupled Memories...........................................................................39
2.3.1.7 JTAG Interface ............................................................................................40
2.3.1.8 Vectored Interrupt Controller .......................................................................40
2.3.1.9 CPU Operating Frequency ..........................................................................42
2.3.1.10 CPU Power Modes ......................................................................................42
2.3.1.11 Timers..........................................................................................................43
3. Memory and System Interconnect 44
3.1 Features..................................................................................................................................44
3.2 Block Diagram ........................................................................................................................44
3.3 Functional Overview ...............................................................................................................45
3.3.1 Memory Regions .........................................................................................................45
3.3.2 System Interconnect ...................................................................................................47
3.3.3 Low-Power Operations................................................................................................47
3.3.4 Cache Operations .......................................................................................................48
3.3.4.1 Cache Coherency........................................................................................48
3.3.5 Memory Usage............................................................................................................49
4. Global Controller (GCTL) 51
4.1 GPIO Pins...............................................................................................................................51
4.1.1 I/O Matrix Configuration ..............................................................................................51
4.1.2 I/O Drive Strength .......................................................................................................53
4.1.3 GPIO Pull-up and Pull-down .......................................................................................53
4.1.4 Simple GPIO Override ................................................................................................53
4.1.5 Complex GPIO Override .............................................................................................53
4.1.6 I/O Power Observability ..............................................................................................54
4.1.6.1 GCTL_IOPOWER........................................................................................54
4.1.6.2 GCTL_IOPWR_INTR ..................................................................................54
4.1.6.3 GCTL_IOPWR_INTR_MASK ......................................................................54
4.2 Clock Management.................................................................................................................54
4.3 Power Management................................................................................................................56
4.3.1 Power Domains...........................................................................................................56
4.3.2 Power Modes ..............................................................................................................57
4.3.3 Reset...........................................................................................................................57
4.3.4 Hard Reset ..................................................................................................................57
4.3.5 Soft Reset ...................................................................................................................57
5. FX3 DMA Subsystem 58
5.1 DMA Introduction ....................................................................................................................58
5.2 DMA Features.........................................................................................................................58
5.3 DMA Block Diagram ...............................................................................................................58
5.4 DMA Overview........................................................................................................................59
5.5 DMA Subsystem Components................................................................................................60
5.5.1 Clocking ......................................................................................................................60