EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 5
Contents
5.5.2 Descriptors Buffers, and Sockets................................................................................61
5.5.3 DMA Descriptors .........................................................................................................61
5.5.4 DMA Buffer..................................................................................................................63
5.5.4.1 Implications of Data Cache Usage ..............................................................63
5.5.4.2 Memory Corruption Due to Cache Line Overlap .........................................64
5.5.4.3 Safe Usage of Data Cache..........................................................................64
5.5.4.4 ALIGNMENT REQUIREMENT - How Not To Share Cache Lines ..............65
5.5.5 Sockets .......................................................................................................................65
5.5.5.1 Software Manipulation of Sockets ...............................................................68
5.5.5.2 Initializing a Socket......................................................................................68
5.5.5.3 Terminating a Socket...................................................................................68
5.5.5.4 Modifying or Suspending a Socket ..............................................................68
5.5.5.5 Inspecting a Socket .....................................................................................69
5.5.5.6 Wrapping Up a Socket.................................................................................69
5.5.6 Illustration of Descriptor, Buffer and Socket Usage.....................................................69
5.5.7 Understanding DMA Operation: Peripheral to Peripheral ...........................................69
5.5.8 Interrupt Requests.......................................................................................................71
5.5.9 DMA Interrupts ............................................................................................................71
5.6 Programming Sequence .........................................................................................................72
5.6.1 Initialization .................................................................................................................72
5.6.1.1 Producer Half...............................................................................................72
5.6.1.2 Consumer Half.............................................................................................72
5.6.2 Peripheral to Peripheral Transfer ................................................................................73
5.7 CPU Intervention In Between Ingress and Egress .................................................................76
5.8 Concept of DMA Channels .....................................................................................................77
6. Universal Serial Bus (USB) 78
6.1 Introduction .............................................................................................................................78
6.2 Features..................................................................................................................................78
6.3 Block Diagram ........................................................................................................................78
6.4 Overview.................................................................................................................................79
6.4.1 USB Interface Block ....................................................................................................79
6.4.2 USB 3.0 Function Controller .......................................................................................79
6.4.3 USB 2.0 Function Controller .......................................................................................79
6.4.4 USB 2.0 Embedded Host ............................................................................................79
6.4.5 USB OTG Controller ...................................................................................................80
6.4.6 End-Point Memory ......................................................................................................80
6.4.7 DMA Adapters .............................................................................................................80
6.4.8 USB I/O System ..........................................................................................................80
6.4.8.1 USB 2.0 OTG PHY ......................................................................................80
6.4.8.2 USB 3.0 PHY...............................................................................................81
6.5 UIB Top-Level Register Interface ...........................................................................................81
6.6 USB Function Controllers .......................................................................................................83
6.6.1 USB 3.0 Function ........................................................................................................83
6.6.1.1 Clocking.......................................................................................................83
6.6.1.2 Interrupt Requests .......................................................................................83
6.6.1.3 USB 3.0 Functional Description...................................................................84
6.6.2 Physical Layer.............................................................................................................85
6.6.3 Link Layer....................................................................................................................86