EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 503
PROT_CS
0xE0033400
10.16.1 PROT_CS (continued)
24 PROT_HOST_RESET_RESP This bit is used to inform the protocol of what the response to incoming TP/DPH should be after
warm/host reset. This register will be used by Protocol until the LINK_INTR.LTSSM_RESET is
cleared by CPU.
0 Issue NRDY
1 Ignore TP
23:18 TP_THRESHOLD[5:0] Ingress TP response transmit buffer threshold for almost full flag. When buffer contains TP_-
THRESHOLD items or more, controller will stop issuing credits to host. This field must be larger than
0. The transmit buffer can hold up to 64 responses.
17 NRDY_ALL Set this bit to ‘1’, the hardware will send NRDY all transfers from the host in all endpoint1-31.
16 SETUP_CLR_BUSY Allow device to ACK SETUP status phase packets
6:0 DEVICEADDR[6:0] During the USB enumeration process, the host sends a device a unique 7-bit address, which the USB
core copies into this register. The USB Core will automatically respond only to its assigned address.
During the USB RESET, this register will be cleared to zero.
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