EZ-USB FX3 Technical Reference Manual, Document Number: 001-76074 Rev. *F 62
FX3 DMA Subsystem
FX3 RAM as described in the Memory and System Interconnect chapter on page 44. During a transfer, descriptors are loaded
into the active socket one at a time for execution.
Figure 5-4. FX3 DMA Descriptor Structure
Each descriptor contains four 32-bit words. Figure 5-4 details the fields of the data structure.
DSCR_BUFFER provides the pointer of the buffer used for this transfer.
DSCR_SYNC defines the source and destination of this transfer. Depending on the use case, the event generation and
interrupt can be enabled for either or both the consumer and producer half. Events are used to signal the peer socket,
whereas interrupts are used to notify the CPU
A unique IP_NUM, which is assigned to each DMA-capable peripheral, is used for the source (producer) and destination
(consumer) of the transfer. A unique IP_NUM, which is assigned to each DMA-capable peripheral, is used for the source
(producer) and destination (consumer) of the transfer.
IP_NUM together with the socket number determines the actual socket identity. Ta b l e 5- 2 details how sockets are identified
by IP identification and socket number.
DSCR_CHAIN contains the pointers to next descriptors for the producer and consumer respectively.
DSCR_SIZE defines the size of the buffer and transfer byte count. The specific transfer status can also be set or monitored
by the following bits:
■ BUFFER_OCCUPIED indicates that data is available in the associated buffer.
■ BUFFER_ERROR indicates whether the data is valid or in error.
❐ EOP marks this transfer with end-of-packet. The socket can use this to suspend an EOP condition.
■ MARKER is simply a software indicator for this specific transfer.
See the following register descriptions:
■ DSCR_BUFFER on page 616
■ DSCR_SYNC on page 617
■ DSCR_CHAIN on page 619
■ DSCR_SIZE on page 620
The following C code example is the DMA descriptor data structure used in the FX3 SDK.
/** \brief Descriptor data structure.
**Description**\n
This data structure contains the fields that make up a DMA descriptor on
the FX3 device.
Each structure member is composed of multiple fields as shown below. Refer
to the sock_regs.h header file for the definitions used.
Offset 313029282726252423222120191817161514131211109876543210 Name
0X00 DSCR_BUFFER
0X04
EN_PROD_INT
EN_PROD_EVT
EN_CONS_INT
EN_CONS_EVT
DSCR_SYNC
0X08 DSCR_CHAIN
0X0C
BUFFER_OCCUPIED
BUFFER_ERROR
EOP
MARKER
DSCR_SIZE
BUFFER_SIZE
BUFFER_ADDRESS
PROD_IP_NUM PROD_SCK CONS_IP_NUM CONS_SCK
PROD_NEXT_DSCR CONS_NEXT_DSCR
BYTE_COUNT
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